Conventionally, a metal oxide semiconductor field effect transistor (MOSFET) is known as a semiconductor device having a switching function (see, for example, Patent Document 1). The Patent Document 1 discloses a trench gate MOSFET (semiconductor device) in which a gate electrode is embedded in a trench formed in a semiconductor layer.
FIG. 46 is a cross sectional view illustrating a structure of a conventional MOSFET (semiconductor device) disclosed in the Patent Document 1. With reference to FIG. 46, the conventional MOSFET (semiconductor device) includes an N+ type semiconductor substrate 301 and an epitaxial layer (semiconductor layer) 302 formed on the upper surface of the semiconductor substrate 301. This epitaxial layer 302 includes an N− type impurity region (drain region) 302a, a P type impurity region 302b and an N+ type impurity region (source region) 302c formed in this order from the semiconductor substrate 301 side.
In addition, the epitaxial layer 302 is provided with a trench 303 that is formed so as to penetrate the N+ type impurity region 302c and the P type impurity region 302b and to reach a halfway depth of the N− type impurity region 302a. A gate electrode 305 is embedded in the trench 303 via a gate insulator film 304. In addition, an interlayer insulator film 306 is formed on the upper surface of the epitaxial layer 302 so as to close the opening end of the trench 303.
In addition, a source electrode 307 is formed on the upper surface of the epitaxial layer 302 so as to cover the interlayer insulator film 306. In addition, a drain electrode 308 is formed on the back surface of the semiconductor substrate 301.
In the conventional MOSFET having the above-mentioned structure, applied voltage to the gate electrode 305 is changed for on-off control.
Specifically, when a predetermined positive potential is applied to the gate electrode 305, minority carrier (electrons) in the P type impurity region 302b is attracted to the trench 303 side, and an inversion layer 309 is formed, which connects the N− type impurity region (drain region) 302a with the N+ type impurity region (source region) 302c. Thus, current can flow between the source electrode 307 and the drain electrode 308 via the inversion layer 309. As a result, the MOSFET is turned on.
In this way, in the conventional MOSFET, the inversion layer 309, which is formed so as to connect the N− type impurity region (drain region) 302a with the N+ type impurity region (source region) 302c, is made to function as a channel.
In addition, when the application of the predetermined positive potential to the gate electrode 305 is stopped from the above-mentioned state, the inversion layer (channel) 309 disappears so that the current flowing between the source electrode 307 and the drain electrode 308 can be interrupted. As a result, the MOSFET is turned off.
Patent Document 1: JP-A-2001-7149